The present invention relates to a head driving device for an ink-jet printer having an ink-jet head which utilizes electrostrictive elements for causing variations in pressure in ink chambers by electrostriction thereof.
The head of an ink-jet printer of this type has, e.g., an arrangement shown in FIG. 8. More specifically, a plurality of recessed grooves are formed in a piezoelectric member 1 at predetermined pitches, and an upper lid 2 is fixed on the grooves to form ink chambers 3 in association with the grooves. An electrode 4 is spread over the bottom portion and side walls of each ink chamber 3. A nozzle (not shown) is formed in front of each ink chamber 3, and an ink supply port (not shown) is formed in the rear of each ink chamber 3. In this head, the piezoelectric member 1 has portions forming walls for partitioning the ink chambers 3 from each other and serving as piezoelectric elements 5 interposed between electrodes 4. For this reason, adjacent two of the electrodes 4 constitutes a capacitance along with the piezoelectric element 5 located therebetween. Accordingly, the equivalent circuit of this head may be expressed by a series circuit of capacitors connected to each other via the electrodes 4.
A head driving device for driving such a head is disclosed in Japanese Unexamined Patent Publication No. 2-18054. For example, as shown in FIG. 9, the equivalent circuit of the head is a series circuit of capacitances CL1, CL2, CL3, CL4, - - - connected in series and constituted by piezoelectric elements 5 and electrodes a, b, c, d, e, - - - . For this circuit, p-channel MOS field effect transistors Q11, Q12, Q13, Q14, Q15, - - - are connected between a VDD power supply terminal and the electrodes a, b, c, d, e, - - - , and n-channel MOS field effect transistors Q21, Q22, Q23, Q24, Q25, - - - are connected between a ground line and the electrodes a, b, c, d, e, - - - .
Diodes D1, D2, D3, D4, D5, - - - are connected in parallel with the n-channel MOS field effect transistors Q21, Q22, Q23, Q24, Q25, - - - to have reversed polarity. The back gates of the p-channel MOS field effect transistors Q11, Q12, Q13, Q14, Q15, - - - are connected to the VDD power supply terminal, and the back gates of the n-channel MOS field effect transistors Q21, Q22, Q23, Q24, Q25, - - - are connected to the ground line. Drive signals are supplied to the gate terminals of the field effect transistors Q11, Q12, Q13, Q14, Q15, - - - through inverters IN1, IN2, IN3, IN4, IN5, - - - . In this driving device, for example, when the electrode c is energized, a drive signal is supplied to the gate terminal of the field effect transistor Q13 through the inverter IN3 to turn on the transistor Q13. The field effect transistors Q22 and Q24 are also turned on. At this time, a charge current flows through a path: VDD&gt;transistor Q13&gt;capacitance CL2&gt;transistor Q22&gt;ground line, and a charge current flows through a path: VDD&gt;transistor Q13&gt;capacitance CL3&gt;transistor Q24&gt;ground line, thereby charging the capacitances CL2 and CL3. When the capacitances CL2 and CL3 are to be discharged, the field effect transistors Q13, Q22, and Q24 are turned off, and the field effect transistor Q23 is turned on. At this time, a discharge current flows through a path: ground line&gt;diode D2&gt;capacitance CL2&gt;transistor Q23&gt;ground line, and a discharge current flows through a path: ground line&gt;diode D4&gt;capacitance CL3&gt;transistor Q23&gt;ground line, thereby discharging the capacitances CL2 and CL3.
With the charging and discharging, the piezoelectric element between the electrodes b and c and the piezoelectric element between the electrodes c and d are distorted. Since an ink chamber is temporarily expanded and then returns to the original state, ink in the ink chamber is ejected via the nozzle by a pressure applied thereto.
When such a head driving device is incorporated in a semiconductor substrate to be an IC (integrated circuit), the following problem is raised. More specifically, since the diodes D2 and D4 are turned on in discharging, the voltages of the electrodes b and d are lower than the ground potential by a forward voltage drop across a PN contact. In this case, since parasitic diodes are formed between the electrodes b and d and the back gates of the field effect transistors Q22 and Q24, part of the discharge current also flow in both the parasitic diodes. The reliability of the IC is degraded due to the currents which flow in the semiconductor substrate. In addition, inter-element isolation is degraded, and, in the worst case, latch up may occur.